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MA3864 AUGUST 1993
ADVANCE DATA
DS3832-2.1
MA3864
RADIATION HARD 8192 x 8 BIT MASK-PROGRAMMABLE ROM
The MA3864 64k Mask Programmable ROM is configured as 8192x8 bits and manufactured using CMOS-SOS high performance, radiation hard, 1.5m technology. The design has full static operation with no clock or timing strobe required. Address input buffers are deselected when chip select is in the HIGH state. Programming is performed during fabrication by customising the penultimate layer of the process. Programming data may be supplied in EPROM or as a data file in the standard INTEL Hex format. Operation Mode Read Output Disable Standby *E L L H X G L H X X I/O D OUT High Z High Z X ISB 2 Power
FEATURES
s 1.5m CMOS-SOS Technology s Latch-up Free s Fast Access Time 60ns Typical s Total Dose 106 Rad(Si) s Transient Upset >1011 Rad(Si)/sec s SEU 4.3 x 10-11 Errors/bitday s Single 5V Supply s Three State Output s Low Standby Current 100A Typical s -55C to +125C Operation s All Inputs and Outputs Fully TTL or CMOS Compatible s Fully Static Operation s Programmable at Via Level for Fast Turnaround s 4 Mask Programmable Chip Selects
*E is a mask programmed NAND function of E1,E2,E3,E4 and their inverses. Figure 1: Truth Table
Figure 2: Block Diagram
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MA3864
SIGNAL DEFINITIONS
A0-12 Address input pins which select a particular eight bit word within the memory array. Q0-7 Data output pins E1, E2, E3, E4 Are mask programmed, to the customer's specification, to form the active LOW chip select function (E). E is driven by a 4-input NAND gate which has E1,E2,E3,E4 or their inverses as it's inputs. Unused NAND gate I/Ps will be tied high internally. When chip select (E) is low, a read is activated. When it is at a high level it defaults the ROM to a precharge condition and holds the data output drivers in a high impedance state. G Output Enable which when at a high level holds the data output drivers in a high impedance state. When at a low level, data output driver state is defined by CS. If this signal is not used it must be connected to VSS.
CHARACTERISTICS AND RATINGS
Symbol VCC VI TA TS Parameter Supply Voltage Input Voltage Operating Temperature Storage Temperature Min. -0.5 -0.3 -55 -65 Max. 7.0 VDD+0.3 125 150 Units V V C C Stresses above those listed may cause permanent damage to the device. This is a stress rating only and functlonal operation of the device at these condltions, or at any other condition above those indicated in the operations section of this specification, is not implied Exposure to absolute maxlmum rating conditions for extended periods may affect device reliability.
Figure 3: Absolute Maximum Ratings
Notes for Table 4: Characteristics apply to pre radiation at TA = -55C to +125C with VDD = 5V 10% and to post 100k Rad(Si) total dose radiation at TA = 25C with VDD = 5V 10% (characteristics at higher radiation levels available on request). GROUP A SUBGROUPS 1, 2, 3. Symbol VDD VlH VlL VOH1 VOH2 VOL ILI ILO ISB1 Parameter Supply voltage Logical `1' Input Voltage Logical `0' Input Voltage Logical `1' Output Voltage Logical `1' Output Voltage Logical `0' Output Voltage Input Leakage Current Output Leakage Current Selected Static Current (CMOS) Conditions IOH1 = -4mA IOH2 = -3mA IOL = 8mA VIN = VDD or VSS all inputs Chip disabled, VOUT = VDD or VSS All inputs = VDD -0.2V except CS = VSS +0.2V fRC = 1MHz, all inputs switching, VIH = VDD -0.2V CS = VDD -0.2V Figure 4: Electrical Characteristics (TTL) (CMOS) (TTL) (CMOS) (Option) Min. 4.5 2.0 0.8 VDD VSS VSS 2.4 VDD -0.5 Typ. 5.0 0.1 Max. 5.5 VDD VDD 0.8 0.2 VDD 0.4 10 10 2 Units V V V V V V V V A A mA
IDD
Dynamic Operating Current (CMOS) Standby Supply Current
-
3
10
mA
ISB2
-
0.1
2
mA
2
MA3864
AC CHARACTERISTICS
Conditions of Test for Table 5: 1. Input pulse = VSS to 4.5V. 2. Times measurement reference level = 1.5V. 3. Input Rise and Fall times 5ns. 4. Output load 1TTL gate and CL = 60pF. 5. Transition is measured at 500mV from steady state (TELQX, TEHQZ, TGHQZ). 6. These parameters are sampled and not 100% tested (TELQX, TEHQZ, TGHQZ). Characteristics apply to pre-radiation at TA = -55C to +125C with VDD = 5V10% and to post 100k Rad(Si) total dose radiation at TA = 25C with VDD = 5V 10%. GROUP A SUBGROUPS 9, 10, 11. Symbol TAVAX TAVQV *TELQV TGLQV TAXQX *TELQX *TEHQZ TGHQZ TELEH Parameter Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Output Hold Time for Address Access Chip Select Low to Outputs Active Chip Select High to Outputs Hi-Z Output Enable High to Output Hi-Z Chip Select Pulse Width Min 60 15 60 Max 60 60 15 30 30 10 Units ns ns ns ns ns ns ns ns ns
*These functions refer to the action of the internal chip select, E. The timings given are relative to the last of the pins; E1, E2, E3 and E4 to change which causes the specified transitions of E. Figure 5: Read Cycle AC Electrical Characteristics
Symbol CIN COUT
Parameter Input Capacitance Output Capacitance
Conditions Vl = 0V VI/O = 0V
Min. -
Typ. 3 5
Max. 5 7
Units pF pF
Note: TA = 25C and f = 1MHz. Data obtained by characterisation or analysis; not routinely measured. Figure 6: Capacitance
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MA3864
Symbol FT Parameter Basic Functionality Conditions VDD = 4.5V - 5.5V, FREQ = 1MHz VIL = VSS, VIH = VDD, VOL 1.5V, VOH 1.5V TEMP = -55C to +125C, GPS PATTERN SET GROUP A SUBGROUPS 7, 8A, 8B Figure 7: Functionality
Subgroup 1 2 3 7 8A 8B 9 10 11
Definition Static characteristics specified in Table 4 at +25C Static characteristics specified in Table 4 at +125C Static characteristics specified in Table 4 at -55C Functional characteristics specified in Table 7 at +25C Functional characteristics specified in Table 7 at +125C Functional characteristics specified in Table 7 at -55C Switching characteristics specified in Table 5 at +25C Switching characteristics specified in Table 5 at +125C Switching characteristics specified in Table 5 at -55C Figure 8: Definition of Subgroups
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MA3864
TIMING DIAGRAMS
Address
TAVQV
TAXQX
Q
1. E and G = VIL
Figure 9: Address Controlled Read Cycle
TAVAX
Address
TAVQV
_ E*
TELEH TELQV TELQX TEHQZ
Q
1. G = VIL 2. Address valid prior to or coincident with E transition low 3. *See footnote to Figure 5 Figure 10: Chip Select Controlled Read Cycle
5
MA3864
_ G
TGLQV
TGHQZ
Q
1. E = VIL 2. Address stable
Figure 11: Output Enable Operation
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MA3864
OUTLINES AND PIN ASSIGNMENTS
D
14
1
15
28
W Seating Plane ME
A1 A
H e b Z 15
C e1
E4
1 2 3 4 5 6 7 8 9 Top View
28 VCC 27 E3 26 E2 25 A8 24 A9 23 A11 22 G 21 A10 20 E1 19 Q7 18 Q6 17 Q5 16 Q4 15 Q3
Ref A A1 b c D e e1 H Me Z W
Millimetres Min. 0.38 0.35 0.20 4.71 Nom. 2.54 Typ. 15.24 Typ. Max. 5.715 1.53 0.59 0.36 36.02 5.38 15.90 1.27 1.53 Min. 0.015 0.014 0.008 0.185 -
Inches Nom. 0.100 Typ. 0.600 Typ. Max. 0.225 0.060 0.023 0.014 1.418 0.212 0.626 0.050 0.060
A12 A7 A6 A5 A4 A3 A2 A1
A0 10 Q0 11 Q1 12 Q2 13 GND 14
XG404
Figure 12: 28-Lead Ceramic DIL (Solder Seal) - Package Style C
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MA3864
E b
D
S
e L A c
E2 Q
VCC 28 E3 27 E2 26 A8 25
1 E4 2 A12 3 A7 4 A6 5 A5 6 A4 Bottom View 7 A3 8 A2 9 A1 10 A0 11 Q0 12 Q1 13 Q2 14 GND
Pin 1
A9 24 A11 23 G 22 A10 21 E1 20 Q7 19 Q6 18 Q5 17 Q4 16 Q3 15
Ref A b c D E E2 e L Q S
Millimetres Min. 0.381 0.076 18.08 12.50 9.45 1.143 8.00 0.66 Nom. Max. 2.97 0.482 0.152 18.49 12.9 9.85 1.40 9.27 1.14 Min. 0.015 0.003 0.712 0.492 0.372 0.045 0.315 0.026 -
Inches Nom. Max. 0.117 0.019 0.006 0.728 0.508 0.388 0.055 0.365 0.045
XG543
Figure 13: 28-Lead Ceramic Flatpack (Solder Seal) - Package Style F
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MA3864
RADIATION TOLERANCE
Total Dose Radiation Testing For product procured to guaranteed total dose radiation levels, each wafer lot will be approved when all sample devices from each lot pass the total dose radiation test. The sample devices will be subjected to the total dose radiation level (Cobalt-60 Source), defined by the ordering code, and must continue to meet the electrical parameters specified in the data sheet. Electrical tests, pre and post irradiation, will be read and recorded. GEC Plessey Semiconductors can provide radiation testing compliant with MIL-STD-883 test method 1019, Ionizing Radiation (Total Dose). Total Dose (Basic function) Total Dose (Function to specification) Transient Upset Neutron Hardness (Function to specification) Single Event Upset (GSO 10% worst case) Latch-up 1x105 Rad(Si) 1x106 Rad(Si) >1011 Rad(Si)/sec >1015 neutrons/cm2 4.3x10-11 errors/bitday Not possible
Figure 14: Typical Radiation Hardness Parameters
ORDERING INFORMATION
Unique Circuit Designator
Mask Revision
Radiation Tolerance S R T Q Radiation Hard Processing 100 kRads (Si) Guaranteed 150 kRads (Si) Guaranteed 300 kRads (Si) Guaranteed
For radiation levels above those stated please contact Marketing
x15Sx88nnxxxxxx
QA/QCI Process (See Section 9 Part 4)
Test Process (See Section 9 Part 3)
T C
TTL CMOS
Assembly Process (See Section 9 Part 2)
Reliability Level Package Type C F Ceramic DIL (Solder Seal) Flatpack (Solder Seal) L C D E B S Rel 0 Rel 1 Rel 2 Rel 3/4/5/STACK Class B Class S
For details of reliability, QA/QC, test and assembly options, see `Manufacturing Capability and Quality Assurance Standards' Section 9.
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MA3864
HEADQUARTERS OPERATIONS
CUSTOMER SERVICE CENTRES
GEC PLESSEY SEMICONDUCTORS Cheney Manor, Swindon, Wiltshire, SN2 2QW, United Kingdom. Tel: (0793) 518000 Fax: (0793) 518411 GEC PLESSEY SEMICONDUCTORS P.O. Box 660017, 1500 Green Hills Road, Scotts Valley, California 95067-0017, United States of America. Tel: (408) 438 2900 Fax: (408) 438 5576
* FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45 Fax: (1) 64 46 06 07 * GERMANY Munich Tel: (089) 3609 06-0 Fax: (089) 3609 06-55 * ITALY Milan Tel: (02) 66040867 Fax: (02) 66040993 * JAPAN Tokyo Tel: (03) 5276-5501 Fax: (03) 5276-5510 * NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023 * SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872 * SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36 * TAIWAN, ROC Taipei Tel: 886 2 5461260 Fax: 886 2 7190260 * UK, EIRE, DENMARK, FINLAND & NORWAY Swindon, UK Tel: (0793) 518510
Fax: (0793) 518582 These are supported by Agents and Distributors in major countries world-wide. (c) GEC Plessey Semiconductors 1993 Publication No. DS3832-2.1 August 1993 TECHNICAL DOCUMENTATION - NOT FOR RESALE. PRINTED IN UNITED KINGDOM.
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior knowledge the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request.
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